I chose the Altera EPM7128SLC CPLD for my first design for the upcoming synkie delay module because it comes in still a human PLCC84 package. But it’s too small, pin wise but also not enough macrocells to get all the functionality I want for the SDRAM controller.
The problem is that all bigger FPGAS/CPLDS come in much smaller packages. Ball grid array chips cannot be soldered by hand – until I’m able to do DIY reflow soldering – that’s stuff for a next research week – these are out of question…
But even TQFP100 packages are so tiny that I could not even print them on my laser printer without the smd pads touching each other.
Then I found out: vector based programs like Apple’s Preview or Adobe Illustrator do a whole lot of antialiasing when displaying (and printing) the original eps from the EAGLE cam job. The printer actually prints some gray on the edges of the black pads, filling in the space between – and because the pad distance does not fit precisely in the printer’s resolution this creates some sort of moirée pattern. The solution was for me to open the eps file using Photoshop – at 2400dpi without antialiasing (there’s a checkbox for that). This pixel based rendering prints much sharper that the vector based one.Illustrator antialiasing creating gray zones in the gaps.
So the problem was – once again – only in software. With the nice sharp print edging was a breeze (fresh etching solution, all edges of the PCB well filed down to prevent air gaps between transparency and PCB when flashing).
Soldering by hand took a good loupe, some flux, plenity of wick and some patience – but it’s actually quite easy. I even managed to fix some connections I forgot in my layout by soldering wires directly to the pads:sk611 delay – prototype 2
|Power Draw on +5V:||N/A|
|Power Draw on -5V:||N/A|
Schematic & PCB
No observations yet
There are no differences between the October 27, 2013 @ 10:07:08 revision and the current revision. (Maybe only post meta information was changed.)